Founding Engineer (Systems + ML)
Hybrid (San Francisco, CA)$130k - $300kFull-timePosted 11mo ago
About the role
Partcl is building next-generation chip design automation tools leveraging AI and high-performance systems. The role focuses on ML plus systems work to accelerate chip design workflows, with hands-on kernel and pipeline development, optimization, and customer deployments.
Responsibilities
- Explore new ML model architectures which give 1000x performance over existing methods for chip design.
- Architect and build end‑to‑end pipelines: high‑performance kernels, efficient file IO, training models, latency sensitive inference, CLI/UI layers.
- Talk to customers, deploy in their office, fix prod on the fly.
- Learn quickly.
Qualifications
- Expert in PyTorch and CUDA programming.
- Deep understanding of systems - memory, latency, and performance tradeoffs.
- Experience designing, training and deploying custom models (a GPT wrapper does not count).
- Versatility: comfortable toggling between model architecture design, low‑level optimization and scaleable system design (N~>10M).
- Proficient with GPU profiling and performance analysis.
Skills
Required:PyTorchCUDASystems designModel design and deploymentGPU profiling
Last updated Sep 30, 2026. Interested? Apply on the company site.
About Partcl
Design a chip in minutes
Partcl modernizes chip design automation with physics-informed models powered by GPU acceleration. Our tools run up to 700× faster than legacy solutions, cutting weeks off development and unlocking AI-driven optimization.