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SoC Power Modeling Engineer

Apple· Hardware
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Hybrid (Austin, TX)full-timePosted 6mo ago

About the role

Engineer in Apple’s Silicon Engineering group focused on modeling power dissipation and power delivery for various IPs in upcoming Apple SoCs. Collaborates across architecture, design, thermals, PMIC, and system design to model power/current profiles and voltage-frequency operating points, and correlates models to HW data with lab/validation teams.

Responsibilities

  • Modeling power dissipation and power delivery
  • Establishing voltages for DVFM states of IPs, including Neural Engines, CPUs, Graphics, compute (AI/ML) accelerators, media IPs, caches and fabric
  • Modeling power dissipation for customer use-cases
  • Interacting with Technology, Silicon Validation, and Product Engineering teams to establish voltage-frequency design points pre- and post-silicon
  • Working with the power lab and test teams to correlate models to HW data

Qualifications

  • Bachelor’s degree in a relevant field
  • minimum 3 years of relevant industry experience
  • 3+ years relevant experience (preferred)
  • programming skills
  • understanding of low-power digital design and power fundamentals
  • Understanding of SOC power modeling and current demand
  • Understanding of electrical properties of on-die PDN, power gating, package and system power delivery
  • Scripting, data analysis and experience with EDA tools
  • Understanding of VLSI design flow and CMOS technology
  • Extensive background in EE
  • Ability to understand and model thermal control loops and throttling mechanisms
  • Familiarity with physical design tools for power optimization
  • Strong teamwork and communication skills

Skills

Required:Power modelingVoltage-frequency design points (DVFM)ScriptingEDA toolsCMOS/VLSI basicsThermal modeling/throttlingCommunication

Benefits

  • Benefits mentioned on Apple careers page (not enumerated in description)
Last updated Sep 11, 2026. Interested? Apply on the company site.

About Apple

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