Graphics (GPU) Architectural Modeling Engineer
Apple· Hardware
Hybrid (Orlando, Florida), Hybrid (Austin, Texas), Hybrid (Santa Clara, California)Full-timePosted 6mo ago
About the role
Pre-silicon functional and performance modeling of high-performance, power-efficient GPUs for Apple's SoC. Develop detailed architectural and micro-architectural models, validate and verify GPU designs, and drive HW/SW co-validation and modeling infrastructure across cross-functional teams.
Responsibilities
- Drive the development, validation, and verification of advanced graphics processing unit (GPU) designs and architectures.
- Drive and develop bit-accurate architectural models for hardware/software (HW/SW) co-validation.
- Drive and develop timing-accurate architectural and micro-architectural models for performance validation and correlation.
- Drive the triage of regression failures and debug failures to root cause.
- Drive coding and modeling best-practices and improve modeling infrastructure.
- Drive multi-functional teams to best practice HW and SW solutions.
- Roll up and present results and recommendations while working closely and collaboratively across functional teams and organizations.
Qualifications
- Experience in C++ Programming.
- Experience with scripting languages Python, Ruby, or Perl.
- Minimum of BS + 10 years of relevant experience.
- Knowledge of GPU, CPU, or SIMD architectures.
- Background in GPU Graphics Pipeline.
- Background in CPU or GPU Memory Hierarchies.
- Background in Advanced CPU Architecture and Micro-architecture.
- Understanding of GP-GPU Compute.
- Experience with the bring-up and debug of complex systems and micro-architectures.
- Experience with turning architectural and micro-architectural specifications into executable C++ models.
- Experience in performance analysis and debug.
- Experience with HDLs, Verilog, System Verilog or VHDL.
Skills
Required:C++ programmingscripting languagesGPU/CPU/SIMD architecturesGPU Graphics PipelineMemory HierarchiesCPU Architecture/Micro-architectureGP-GPU ComputeSystem bring-up and debugModeling in C++Performance analysis and debuggingHDLs (Verilog/SystemVerilog/VHDL)
Last updated Jun 26, 2026. Interested? Apply on the company site.
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