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Mixed-Signal Behavioral Modeling Engineer

Apple· Hardware
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Beaverton, ORfull-timePosted 6mo ago

About the role

Mixed-Signal Behavioral Modeling Engineer in Beaverton, Oregon. Model complex custom mixed-signal circuits for verifying system-level functionality and performance. Cross-disciplinary role with collaboration across multiple teams to shape behavioral modeling methodologies and tools for Apple’s state-of-the-art mixed-signal systems.

Responsibilities

  • Write functional models of custom mixed-signal circuits in SystemVerilog with appropriate detail and non-idealities.
  • Collaborate with circuit design teams to understand circuit details and with DV teams to craft hooks for verification.
  • Analyze data from the circuit team in Python/MATLAB for fitting into the model and profile model performance.
  • Run simulations and formal equivalence tools to ensure model accuracy against custom circuits.
  • Work with domain experts to enhance modeling methodology, improve functional coverage, optimize modeling flows, and enable new tools to identify issues.

Qualifications

  • BS degree in technical discipline with minimum 10 years of relevant experience.
  • Excellent knowledge of digital logic gates, clocking and state elements.
  • Excellent knowledge of writing behavioral code in SystemVerilog.
  • Solid understanding of logic and behavioral simulations.
  • Ability to read custom circuit schematics and understand functionality.
  • Good familiarity with circuit elements and functionality of mixed-signal blocks such as PLLs/DLLs/SERDES/Sensors/Data-converters.
  • Good understanding of SPICE circuit simulations, and SystemVerilog/SPICE co-simulations.
  • Good understanding of timing synchronous digital logic.
  • Ability to write scripts in PERL/Python to automate repetitive tasks.
  • Familiarity with the basics of digital signal processing and numerical analysis.
  • Familiarity with the basics of probability and statistics.

Skills

Required:SystemVerilog behavioral modelingPython/MATLAB data analysisSPICE and SystemVerilog co-simulationDigital logic and clockingSchematic readingVerification and testingScripting (PERL/Python)
Nice to have:Digital signal processing fundamentalsProbability and statistics fundamentals
Last updated Jul 3, 2026. Interested? Apply on the company site.

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