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CPU Debug and Power Management Verification Engineer

Apple· Hardware
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Beaverton, ORFull-timePosted 6mo ago

About the role

Highly visible Design Verification Engineer role focused on auxiliary features of a high-performance ARM-based CPU, including Power Management, Clock Control, Debug Infrastructure, Resets, and Special-Purpose Registers. Responsible for pre-silicon test planning through post-silicon bring-up and debug, cross-functional collaboration, and delivering robust, low-power CPU designs.

Responsibilities

  • Work across the entire product lifecycle from pre-silicon test planning to post-silicon bring-up and debug.
  • Collaborate with architecture and RTL designers to verify CPU Power Management, clock control, and debug logic.
  • Develop and execute test plans and schedules.
  • Write and debug tests in Assembly, SystemVerilog, SVA, C++, and scripting languages for simulation, emulation, and FPGA environments.
  • Build and maintain verification infrastructure, including checkers, transactors, and coverage monitors.
  • Analyze functional coverage to ensure test plan completeness.
  • Identify, root-cause, and document design issues and collaborate with RTL teams to drive fixes.
  • Support SoC-level debug for clock and power integration issues.
  • Work with silicon bring-up teams to develop tests and debug issues across emulation, FPGA, and silicon; contribute to post-silicon debug using waveform and trace tools.

Qualifications

  • Minimum BS and 10+ years of relevant industry experience
  • Programming skills in Perl/Python or SystemVerilog
  • Experience in processor or power management architecture and verification
  • Experience with system fabric protocols such as AXI
  • In-depth knowledge in design verification environments like random constraint verification and/or UVM base testbenches
  • Experience in system Verilog assertions or silicon bringup or UPF and low power simulation
  • Experience in processor debug features including hardware trace is a plus
  • Experience with advanced verification techniques such as formal verification is a plus
  • Advanced programming skills such as object oriented programming or CPU assembly language is a plus
  • Excellent communication skills and ability to articulate complex design issues during verification effort
  • Ability to create and follow detailed work schedules and work independently on verification efforts for a block/area of the design

Skills

Required:ProgrammingProcessor or power management architecture and verificationSystem fabric protocolsDesign verification environmentsSystemVerilog assertions / UPF / low power simulationCommunication & collaboration
Nice to have:Processor debug featuresFormal verificationObject oriented programming / CPU assembly
Last updated Sep 25, 2026. Interested? Apply on the company site.

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