Digital IC Design Engineer Intern
Neuralink· Internships
South San Francisco, CAinternPosted 11mo ago
About the role
Internship focused on digital IC design for low-power SoC architectures and hardware accelerators for wireless brain–computer interfaces, including RTL implementation, architecture optimization, verification, and silicon bring-up collaboration.
Responsibilities
- Micro-architecture design and RTL implementation of: Low-power digital signal processors; Low-power general-purpose hardware accelerators; Low-power graphics processing units; Low-power radio MAC/PHY; Low-power serial link MAC/PHY
- Design and implementation of hardware/software interface with firmware engineers
- Application-specific architecture optimization including: Complex system modeling for energy and performance benchmarks; Workload analysis and modeling; Leveraging architecture-level design trade-offs with process technology and workload type; Balancing energy efficiency and performance under manufacturing process variation
- Complex system-on-chip verification
- Behavioral level modeling and model equivalence check
- FPGA emulation
- Analog mixed-signal co-simulation
- Design for testability
- Collaboration on silicon bring-up tests with silicon validation engineers
Qualifications
- Evidence of exceptional ability in electrical engineering, computer science, or computer engineering
- 2+ years of experience in digital design
- Proficient in SystemVerilog, C/C++, Python
- Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools
- Experience in designing digital signal processing pipelines, from algorithm to RTL
Skills
Required:SystemVerilogC/C++Python
Benefits
- An opportunity to change the world and work with highly talented experts from different fields
- Growth potential; rapid advancement for high-impact team members
- Excellent medical, dental, and vision insurance through a PPO plan
- Paid holidays
- Commuter benefits
- Meals provided
- Equity (RSUs) – Temporary Employees & Interns excluded
- 401(k) plan – Interns initially excluded until they work 1,000 hours
- Parental leave – Temporary Employees & Interns excluded
- Flexible time off – Temporary Employees & Interns excluded
Last updated Sep 23, 2026. Interested? Apply on the company site.
About Neuralink
Pioneering Brain Computer Interfaces
Creating a generalized brain interface to restore autonomy to those with unmet medical needs today and unlock human potential tomorrow.
alsbcibrain computer interfaceclinical trialhuman trialneuralinkparaplegiaprime study
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