Senior RTL design engineer - SOC Intergration
HyderabadFull-timePosted 6mo ago
About the role
Senior RTL design engineer role focused on ASIC/SoC integration and verification, located in Hyderabad, India. Join AMD’s silicon design team to contribute to modern processor architecture, digital design, and verification in a global, dispersed environment.
Skills
Required:B.E/M.E/M.Tech or B.S/M.S in EE/CEASIC design flowRTL design in Verilog/SystemVerilogTiming/STA (PrimeTime or equivalent)Low power digital design and analysisModern SOC tools (Spyglass, Questa CDC, Cadence Conformal, VCS)Scripting languages (TCL, Perl, Python)Version control (Perforce, ICManage, Git)Communication and collaboration
Nice to have:C programming
Last updated Oct 22, 2026. Interested? Apply on the company site.
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