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Circuit Design Engineer - Library

Apple· Hardware
Apply on company site
Beaverton, Oregon, United States, San Diego, California, United States, Santa Clara, California, United Statesfull-timePosted 6mo ago

About the role

Lead a custom digital circuits team and library development within the silicon design group, driving high-performance, low-power standard cells and integration with CPU/SOC/GPU teams to deliver advanced ASICs.

Responsibilities

  • Drive development of high performance, low power optimized standard cells to improve design PPA.
  • Drive development of optimal level shifters, retention designs, etc that cater to today’s Low Power Design Requirements.
  • Identify next generation of new ideas to drive PPA improvements further
  • Engage with CPU, SOC and GPU teams on chip level integration requirements.
  • Drive Circuit QA checks & analysis, develop new methodologies based on new design requirements.
  • Work with foundries on DRM complaint layout checkers and iPDK requirements.
  • Plan & drive development of designs like new circuits & tech node enablement.
  • Manage migration to new PDK, PDV of standard cells & releases.

Qualifications

  • Bachelor's Degree + minimum of 3 years of experience
  • We are looking for applicants with 3+ years of experience in Standard cells circuit development.
  • Proven experience in developing, driving & implementing circuit methodologies
  • Proven experience leading & mentoring a small team
  • Strong influence, excellent interpersonal skills & able to work with multi-functional teams
  • Knowledge of standard cell layout, DRM, DRC/LVS decks, PDV flows, Virtuoso.
  • Design experience in advanced tech node device behavior with understanding of layout rules.
  • Design experience in flop, complex Standard Cells design & Power Management Cells.
  • Knowledge of circuit robustness analysis
  • Experience in scripting in Perl and/or TCL.

Skills

Required:Standard cells circuit developmentCircuit methodologiesTeam leadershipInterpersonal collaborationStandard cell layoutTech node know-howPower management cellsScripting
Last updated Aug 21, 2026. Interested? Apply on the company site.

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