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GPU Electrical Analysis Engineer

Apple· Hardware
Apply on company site
Hybrid (London (UK))Full-timePosted 6mo ago

About the role

GPU Electrical Analysis engineer responsible for complete electrical analysis closure from early design planning to tapeout, collaborating with Physical Design to optimize power integrity, PNR, power/area, and integration for next-generation GPU in Apple devices.

Responsibilities

  • Experience planning, implementing, and analyzing power delivery networks.
  • Experience designing and analyzing power delivery schemes with power switches.
  • Experience with Signal/Power Integrity checks including Electromigration, Static IR and Dynamic Voltage drop checks.
  • Experience with global power integrity tool (e.g. Redhawk, Voltus).
  • Minimum BS/MS in EE or similar fields and some years of experience
  • Experience with on-die high frequency power delivery, and exposure to off-die concepts and models.
  • Experience with bump planning and redistribution layer routing strategies, including methods for working with IO bumps and edge encroachment scenarios.
  • Familiar with ASIC integration including Floorplanning, Clock and Power distribution, global signal planning, I/O planning and hard IP integration.
  • Background with large SoC designs (>20M gates) with frequencies in excess of 1GHz using innovative technologies.
  • Track record in solving complex PD and cross functional problems, driving results directly and or directing a team of engineers to innovate and execute on world class GPU designs.
  • Circuit design and simulation background a plus, but not required.
  • Experience with global timing verification, SPICE simulation/analysis, and Physical Design Verification Flows.

Qualifications

  • Minimum BS/MS in EE or similar fields
  • some years of experience
  • On-die high frequency power delivery expertise
  • ASIC integration and large SoC design experience
  • Familiar with PD/Electrical Analysis cross-functional collaboration

Skills

Required:Power delivery network planning and analysisPower switch topology and wake-up schemesSignal/Power integrity checks (EM, IR, eDV)Global power integrity toolsASIC integration and floorplanning
Last updated Jul 3, 2026. Interested? Apply on the company site.

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