GPU Physical Design Engineer
Apple· Hardware
Hybrid (London, England, United Kingdom), Hybrid (Cambridge, England, United Kingdom)Full-timePosted 6mo ago
About the role
Role within Apple’s Silicon Technologies group focused on designing and manufacturing next-generation GPUs with high performance and power efficiency, from RTL to tape-out, collaborating with Front-End teams and leading physical design efforts.
Responsibilities
- Work closely with the Front-End team to understand chip architecture and drive physical aspects early in design cycle.
- Drive best in class Physical Design construction and optimization recipes for performance, power, and Area (PPA).
- Collaborate to drive methodologies and “best known methods” to streamline PD work, come up with guidelines and checklists, drive execution and track progress.
- Be focal point for place and route drive the work among place and route engineers, set goals and breakthroughs, plan short and long-term work, understand dependencies between different domains like top, STA, block Place & Route.
- Manage and resolve design and flow issues related to physical design, identify potential solutions and drive execution.
- Work with Front-End teams to understand the design architecture to drive optimal floorplanning and physical implementation through early RTL feedback.
- Use design knowledge and state-of-the-art physical construction and optimization flow to push performance, power, and Area (PPA) of GPU designs.
- Experience with multi-voltage, power gated and power retention will be an advantage.
- Your practical knowledge with hierarchical design approach, top-down design, budgeting, timing and physical convergence will be an asset.
- Showcase your experience on integrating IP from both internal and external vendors and be able to specify and drive IP requirements in the physical domain.
- Your depth of expertise with large GPU designs (>20M gates) with frequencies in excess of 1GHz utilizing state-of-the-art technologies will serve you well.
- From a CAD tool perspective, experience crafting Floor-planning tools, P&R flows, global timing verification and Physical Design Verification Flows is required.
- Familiar with various process-related design issues including Design for Yield and Manufacturability, multi Vt strategies and thermal management.
Qualifications
- BSc/MSEE/M Eng/BEng or equivalent is required
- We value proven ability in all aspects of ASIC implementation including Synthesis, DFT insertion, Floorplanning, Clock and Power distribution, Place & Route and all aspects of timing, electrical and physical signoff.
Skills
Required:Chip architecture understandingFloorplanningPlace & Route (P&R)Timing analysis and signoffIP integrationCAD tools for physical design
Nice to have:Power, multi-voltage design
Last updated Aug 14, 2026. Interested? Apply on the company site.
About Apple
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