CPU Formal Verification Engineer
Cambridge, United KingdomFull-timePosted 6mo ago
About the role
Formal verification engineer role at AMD focused on advancing formal verification techniques for CPU IP design, leading methodology development, infrastructure, and collaboration across architecture, design, and formal verification teams.
Responsibilities
- Architect and execute formal verification methodologies to comprehensively cover CPU design, including datapath and control logic.
- Scale formal verification to large, critical designs to ensure bug-free quality across the IP lifecycle.
- Resolve convergence challenges using advanced techniques such as proof by induction, COI reduction and abstraction.
- Build and maintain best-in-class formal verification infrastructure for adoption across engineering teams.
- Explore formalization of ISA and memory models for CPU IP.
- Stay at the forefront of formal verification innovation and foster technical relationships across AMD’s design community and EDA partners.
- Champion cross-department collaboration and drive AMD-wide formal verification excellence.
Qualifications
- Bachelors or Masters degree in computer engineering/Electrical Engineering
- Hands-on experience of development of Assertion IP(AIP) and end-to-end properties is highly desirable
- Strong debug skills for uArch functional failures
- Advanced user of formal tools from academia and EDA vendors (e.g., JasperGold, VC Formal)
- Proven success in delivering high-quality verification for large-scale processor designs under tight schedules
- Strong understanding of computer architecture and CPU pipelines
- Experience developing infrastructure for FPV, FXP(x-prop), DPV, SEC and other formal apps is highly desirable
Skills
Required:Formal verification leadershipDebugging uArch functional failuresFormal tools (JasperGold, VC Formal)
Nice to have:Assertion IP (AIP) development
Benefits
- Benefits offered are described: AMD benefits at a glance
Last updated Oct 22, 2026. Interested? Apply on the company site.
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