CPU Processor Power Management Verification Engineer
Apple· Hardware
Santa Clara, CA$150.4k - $277.6kFull-timePosted 6mo ago
About the role
Role focused on verification of Power Management and Clock Control in CPU processors, collaborating with architecture and RTL teams to ensure functional correctness and robust test coverage across simulation, emulation, and silicon bringup.
Responsibilities
- Work closely with architecture and RTL designers on verifying the functionality correctness of the Power Management and Clock Control logic
- Develop and execute test plans and schedules for the power management and clock control logic
- Develop tests in Assembly, Scripts, System Verilog, or vectors according to test plans to drive testing in simulation and emulation environments
- Root cause failures and propose potential solution to the design team
- Work with silicon bringup team on developing tests that work in the emulation and FPGA environments. Aid silicon debug in related part of the design
- Develop coverage monitors and analyze coverage to ensure all the test cases in the test plans are covered
- Develop checkers or Verilog/System Verilog-base transactor to verify the design
- Write assertions and apply formal verification to the design
Qualifications
- Minimum BS and 3+ years of relevant industry experience
- Experience with digital logic, micro-processor architecture, or power management architecture
- Experience with digital design verification including Verilog/System-Verilog based testbenches and transactors checkers
- Programming skills in scripting languages such as Perl or Python
- Master’s degree preferred
- Experience in processor or power management architecture and verification
- In-depth knowledge in design verification environments like random constraint verification and/or UVM base testbenches
- Experience in system Verilog assertions or silicon bringup or UPF and low power simulation
- Experience with advanced verification techniques such as formal verification is a plus
- Advanced programming skills such as object orientated programming or CPU assembly language is a plus
- Strong communication and collaboration skills with the ability to articulate complex design issues during verification
- Ability to create and follow detailed work schedules and work independently on verification efforts for a block/area of the design
Skills
Required:Power Management verificationSystem VerilogVerilogScripting (Python/Perl)
Nice to have:Formal VerificationAssembly
Benefits
- Comprehensive medical and dental coverage
- Retirement benefits
- Discounted products and free services
- Educational expense reimbursement including tuition
- Discretionary bonuses or commission payments (where eligible)
- Relocation assistance (where applicable)
- Employee stock purchase plan eligibility
- Apple shareholder discretionary stock programs
Last updated Aug 7, 2026. Interested? Apply on the company site.
About Apple
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