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SoC Physical Design Engineer, PnR

Apple· Hardware
Apply on company site
Beaverton, ORFull-timePosted 6mo ago

About the role

In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC utilizing innovative process technology.

Responsibilities

  • Work with the logic design team to understand partition architecture and drive physical aspects early in the design cycle.
  • Complete netlist to GDS2 implementation for partition(s) meeting schedule and design goals.
  • Timing, physical and electrical verification, and driving the signoff closure for the partitions.
  • Resolve and improve design and flow issues related to physical design, identify potential solutions, and drive execution.

Qualifications

  • Minimum BS and 3+ years of relevant industry experience.
  • Experience with partition level P&R implementation including floorplanning, clock and power distribution, timing closure, physical and electrical verification.
  • Experience with physical design construction and analysis flows and methodology.
  • Ability to adhere to stringent schedule and die size requirements.
  • Experience with large SOC designs (>20M gates) with frequencies in excess of 1GHZ.
  • Experience with sub 10nm tech nodes.
  • Experience with industry standard tools, understanding their capabilities and underlying algorithms.
  • Strong communication skills.

Skills

Required:Partition level P&R implementationFloorplanningTiming closure
Last updated Sep 11, 2026. Interested? Apply on the company site.

About Apple

Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.

Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.

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