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GPU Electrical Analysis Engineer

Apple· Hardware
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Hybrid (Austin, Texas and Santa Clara, California)Posted 6mo ago

About the role

Role within Silicon Technologies focusing on electrical analysis closure for next-generation GPU design, involving collaboration with Physical Design, power integrity, EM/ESD analyses, and back-end integration from design planning to tapeout.

Responsibilities

  • Realize the complete electrical analysis closure from early design planning to tapeout.
  • Work closely with the Physical Design team to design power grid specifications balancing power integrity targets and PNR performance, power and area (PPA).
  • Define on-die power switch topology, wake-up schemes, and in-rush control.
  • Collaborate with internal teams to drive bump map, custom RDL routing, and package design/optimization.
  • Develop test structures, procedures/automation, and analysis methodologies for electrical analysis challenges.
  • Perform Power Integrity, EM, and ESD analysis, drive feedback, and recommend design solutions.
  • Communicate and drive the needs of PD and Electrical Analysis with multi-functional teams to enable back-end design goals.

Qualifications

  • BS + 3 years of relevant experience
  • Experience with Signal/Power Integrity checks including Electromigration, Static IR and Dynamic Voltage drop checks.
  • Experience with global power integrity tools (e.g. Redhawk, Voltus).
  • Experience with on-die high frequency power delivery, and exposure to off-die concepts and models.
  • Experience with bump planning and redistribution layer routing strategies, including IO bumps and edge encroachment scenarios.
  • Familiar with ASIC integration including Floorplanning, Clock and Power distribution, global signal planning, I/O planning and hard IP integration.
  • Background with large SoC designs (>20M gates) with frequencies >1GHz using innovative technologies.
  • Track record in solving complex PD and multi-functional problems, leading a team to innovate on GPU designs.
  • Circuit design and simulation background a plus, but not required.
  • Experience with global timing verification, SPICE simulation/analysis, and Physical Design Verification Flows.

Skills

Required:Power integrity analysisElectromigrationStatic IR and Dynamic Voltage Drop checksGlobal power integrity toolsOn-die high frequency power deliveryBump planning and RDL routingASIC integrationSoC design experiencePhysical Design Verification
Last updated Oct 16, 2026. Interested? Apply on the company site.

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