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CPU Design Verification Engineer

Apple· Hardware
Apply on company site
Santa Clara, CA$150.4k - $277.6kFull-timePosted 6mo ago

About the role

CPU Verification Engineer responsible for verifying a specific area of functionality in a CPU design, collaborating with architecture and RTL teams, developing test plans, tests, coverage, and verification components to ensure design correctness and bring up silicon.

Responsibilities

  • Work closely with architecture and RTL designers on verifying the functionality correctness of the design
  • Develop and lead test plan and test environments
  • Develop complex tests in assembly, C, or vectors according to test plans
  • Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered
  • Develop checkers or C-base transactor to verify the design

Qualifications

  • Minimum BS and 3+ years of relevant industry experience
  • Experience in digital logic design, chip architecture, and microarchitecture
  • Experience with the development of testplans/testbenches, C-based transactors, and writing/debugging assembly-based tests
  • Experience with C/C++ programming and Verilog
  • Knowledge of advanced verification techniques such as formal and assertions
  • Understanding of silicon bring-up process
  • Should be a great teammate with excellent communication skills and be able to work independently on the verification efforts for a block/area of the design

Skills

Required:Test planningTestbench developmentC/C++ programmingVerilogCommunication
Nice to have:Assembly programmingFormal methods / assertions

Benefits

  • Comprehensive medical and dental coverage
  • retirement benefits
  • range of discounted products and free services
  • reimbursement for certain educational expenses including tuition
  • discretionary bonuses or commission payments (may apply)
  • relocation assistance (may apply)
  • Apple stock programs including Employee Stock Purchase Plan
Last updated Jul 3, 2026. Interested? Apply on the company site.

About Apple

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