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SerDes Circuit Design Engineer

Apple· Hardware
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Melbourne, FLFull-timePosted 6mo ago

About the role

Analog Mixed-Signal design engineer for high-speed SerDes PHY IP development for Apple SOCs. Collaborates with cross-functional teams to design, model, and verify high-performance AMS circuits, focusing on Rx/Tx blocks, clocking, calibration, and interface implementations for 64+ Gbps SerDes applications.

Responsibilities

  • Develop high-performance and high-speed AMS circuits used in SerDes PHY, evaluating different circuit topologies for product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, high-speed analog signal chain, mixed-signal calibration and algorithms) with best in class PPA.
  • Collaborate with cross-functional teams (architecture, SIPI, packaging, board design, DFT, ESD) to create block-level specifications and execute transistor-level implementation and behavioral modeling.
  • Drive mask design to implement layout view of designs.
  • Work with SOC teams to deliver IP views meeting quality standards.
  • Communicate progress and discuss new ideas with peers/management in a regular, interactive environment.

Qualifications

  • Minimum requirement of a bachelors degree
  • Deep understanding of analog mixed-signal design with experience in high-speed serial links
  • Experience designing analog mixed signal blocks (Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters)
  • Understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
  • Knowledge of digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops)
  • Experience with high-speed digital circuits (serializer, deserializer, counters, dividers, etc.)
  • Knowledge of Tx/Rx equalization techniques and circuits (CTLE, DFE, de-emphasis) for 64+ Gbps NRZ and PAM
  • Knowledge of CDR architectures and implementations
  • Knowledge of lab equipment and testing
  • Experience in AMS circuit modeling and performance evaluation (SystemVerilog, Matlab, Python, VerilogAMS)
  • Hands-on experience in advanced CMOS technologies (FinFET)
  • Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization
  • Concepts of timing closure and tools (Nanotime, Primetime)
  • Experience in lab testing of high-speed serial I/O, debugging and data analysis
  • Knowledge of common high-speed SerDes protocols (PCIe, USB, DP, MPHY)
  • Scripting and automation skills are highly desirable

Skills

Required:Analog mixed-signal designBandgap and biasing circuitsLDO regulatorsAmplifiers, comparators, switched-cap circuitsADCs, DACs, Oscillators, FiltersMismatch mitigation, linearity, stability, low-noise techniquesDigitally assisted analog design (background calibrations, LMS loops)High-speed digital circuits (serializer/deserializer, counters, dividers)Tx/Rx equalization (CTLE, DFE, de-emphasis)CDR architecturesLab testing and equipmentAMS IC development lifecycle (layout supervision, bench evaluation, correlation, characterization)Timing closure tools (Nanotime, Primetime)Lab testing of high-speed serial I/OSerDes protocols (PCIe, USB, DP, MPHY)
Nice to have:Scripting and automation

Benefits

  • Learn end-to-end system exposure
  • Competitive IP development for Apple SOCs
  • Collaborative, cross-functional work environment
  • Equal opportunity and accessibility support (EEO and accommodation information provided)
Last updated Sep 25, 2026. Interested? Apply on the company site.

About Apple

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