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SoC UPF Methodology Engineer

Apple· Hardware
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Hybrid (Austin, TX / Beaverton, OR / Cupertino, CA / San Diego, CA)full-timePosted 6mo ago

About the role

Role focused on advancing Unified Power Format (UPF) methodologies for low-power SOC design. Responsible for refining UPF workflows, verification, and integration across frontend and place-and-route stages, with AI/ML support to optimize processes.

Responsibilities

  • Enhancing power intent coverage via advanced static and dynamic verification techniques.
  • Developing tailored UPF solutions to align with unique project requirements.
  • Overseeing UPF deployment and sign-off for frontend (FE) and place-and-route (P&R) stages.
  • Conducting thorough power intent assessments on custom circuitry.
  • Partnering with design and verification teams to troubleshoot and fix UPF-related workflow challenges.
  • Integrating AI/ML technologies to optimize UPF processes and methodologies.

Qualifications

  • A minimum of a bachelor's degree in relevant field and a minimum of 10 years of relevant industry experience
  • Expertise in UPF implementation and verification.
  • Proficiency in scripting with languages like Python and Tcl.
  • Understanding of CMOS power design principles.
  • Experience applying AI/ML to coding and workflow optimization.
  • Knowledge of multi-voltage static verification tools (e.g., VSILP/VCLP, CLP).
  • Familiarity with the complete RTL-to-GDSII design flow.
  • Strong communication abilities for effective collaboration across multidisciplinary teams.

Skills

Required:UPF implementation and verificationPythonTclCMOS power design principlesAI/ML for workflow optimizationStatic verification tools (VSILP/VCLP, CLP)
Last updated Aug 7, 2026. Interested? Apply on the company site.

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