CPU Full Chip Physical Integration Engineer
About the role
In this highly visible role, you will be at the center of a processor design effort interfacing with all disciplines, with a critical impact on getting functional products to millions of customers quickly. You will participate in the physical design, integration, and verification of high performance, low power processor development, driving signoff closure for tapeout and collaborating with SOC and CAD teams.
Responsibilities
- Full chip floorplan, area optimizations, block partitioning and pin placements
Qualifications
- Minimum BS and 3+ years of relevant industry experience
- Experience with scripting in Perl or TCL
- Knowledge of industrial standards and practices in Physical Design, including Floorplanning, Partitioning, Budgeting, Place and Route and Physical Verification
- Experience in developing and implementing Power Grid and Clock specifications
- Solid knowledge of Low Power Design, Physical Construction, Integration, EMIR (Drop/Noise), SIGEM Analysis, Formal Verification, Physical PDV, DRC/LVS Verification, and DFM
- Solid understanding of verification tools such as Conformal LP, LEC, RedHawk, Calibre
- Solid understanding of CMOS circuit design. Layout design background is a plus
- Working knowledge of Extraction and STA methodology and tools
- Working knowledge of Computer Architecture
- Ability to work well in a team, being an excellent problem solver, and self motivated
Skills
About Apple
Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.
Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.
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