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CPU Physical Electrical Analysis Engineer

Apple· Hardware
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Hybrid (Austin, TX)Full-timePosted 6mo ago

About the role

Drive block and top-level EMIR/electrical verification closure for high-performance processor projects, focusing on power delivery, electromigration, IR drop analysis, and automation within the PNR/EMIR flow.

Responsibilities

  • Drive block and top-level EMIR/electrical verification closure
  • Work on power grid design, construction, and implementation using existing infrastructures and create custom solutions in PNR tool environment
  • Collaborate with CAD/EDA vendors, methodology teams, implementation teams, and SOC level teams to ensure fidelity of analysis results, drive design and sign-off closure, and meet IP delivery quality and schedule

Qualifications

  • Minimum BS and 10+ years of relevant industry experience
  • Experience with silicon level power delivery, electromigration, and IR drop analysis
  • Experience with scripting of SAPR or EMIR flow automation for processing large scale design and analysis data, debugging issues, and isolating design sensitivities
  • Experience implementing high-performance and low-power VLSI designs
  • Experience with SAPR/PNR design flow infrastructure
  • Understanding of challenges related to latest deep sub-micron technology
  • Produce impactful design fixes and automate wherever possible across multiple tool domains in physical construction and analysis
  • Working knowledge of industry standard tools like Apache Redhawk and Cadence Voltus, as well as PNR implementation, layout tools, verification, and STA
  • Strong communication and presentation skills to summarize design status and drive convergence across multiple blocks and teams

Skills

Required:EMIR/SDIR flow automationPower delivery analysisPNR/ SAPR design flowTooling: Redhawk, VoltusCommunication

Benefits

  • (not explicitly listed in provided excerpt)
Last updated Jul 3, 2026. Interested? Apply on the company site.

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