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Debug Lead Engineer

AMD· Engineering
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BangaloreFull-timePosted 5mo ago

About the role

Lead System Engineer with end-to-end pre-silicon to post-silicon responsibilities for feature enablement and SoC-system level validation, focusing on X86 design, BIOS/FW, and cross-functional collaboration in a high-performance hardware/firmware environment.

Responsibilities

  • Assume technical responsibility from Pre-silicon to Post-silicon environment for Feature enablement and SoC-System level flow for use cases.
  • Pre-Silicon: New SOC features enablement, implementation and coverage plan in Emulation
  • Pre-silicon: Review all Silicon bugs that deferred out SOC Tape out and ensure it does not impact the system level features / use cases.
  • Post Silicon: Lead the Bring-up planning in collaboration with Silicon teams, Platform, Firmware / BIOS, Post Si Validation team so we have the fastest and functional bring-up as soon as silicon arrives in the lab.
  • Post Silicon: Partner with SOC NPI PM and be the technical lead to support & debug SOC related challenges from Tape out all the way to SOC IP milestone.
  • Post Silicon: Lead cross-functional critical silicon issue debug, uplevel and communicate the updates into core teams and Management program reviews.
  • Post Silicon: Provide inputs to Silicon Validation teams on coverage for New SOC features, enablement, implementation, IPs, and functional coverage at the system level.
  • Exhibit strong technical leadership on X86 architecture and associated feature implementation
  • Exhibit great technical depth in the post silicon enablement and validation of both HW and FW aspects to take the right technical decisions for the team
  • Key responsibilities include:
  • Synergize with the Pre-silicon and DV teams and other stakeholders for proper interception of milestones and risk callouts.
  • Actively participate in discussions with cross-functional teams in defining and refining test plans and guiding the team for the right path.
  • Be on top of all issues pertinent to Debug & Triage of any functional issues across the entire validation cycle
  • Drive meetings for issue closures and actively track schedules and milestone quality metrics
  • Ensure the Best-in-class Documentation and collateral delivery from the team.

Qualifications

  • Highly skilled engineering professional with over 15 years of experience.
  • Solid experience in both Pre and Post Silicon enablement and validation with strong BIOS/FW/SW intercepting knowledge.
  • Solid Experience and Knowledge in the HW and FW aspects of X86 design
  • Solid experience in connecting the bigger picture across different related domains between Hardware/Firmware and Software and com
  • Adept in calling out risks while anticipating issues and coming up with appropriate mitigation plans
  • Experienced in working with the Enablement Manager and Leads, Program Managers, Product Managers, BIOS/FW Managers and other cross functional stakeholders and create a robust alignment setup while running execution.
  • Preferred experience working with cross-functional teams like DV/Silicon Designers/Pre-silicon/Platform/BIOS/FW/ SW.
  • Experience in High Speed I/Os like PCIe (Gen4 and above), Memory (DDR4/DDR5.LPDDR4/LPDDR5), USB4.0/3.2/3.1, USB PD, USB Type C, Display interfaces and Ethernet and high-speed interconnects.
  • Experience in Power Management
  • Hands-on high speed and board measurement techniques in using high end equipment like Oscilloscopes, Logic Analyzers, Debugger tools, Raspberry PI, Network analyzers, etc.
  • Preferred experience with scripting using TCL, Python
  • Excellent communication, collaboration, articulation, upleveling to senior management and team playing skills.

Skills

Required:Pre-silicon to post-silicon enablementX86 architectureHigh Speed I/O technologiesCommunication and leadership
Nice to have:Power ManagementScripting (TCL, Python)

Benefits

  • AMD benefits at a glance (link provided in description)
Last updated Oct 22, 2026. Interested? Apply on the company site.
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