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Lead Verification Engineer - PCIE/CXL

AMD· Engineering
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Hybrid (Bangalore)Full-timePosted 4mo ago

About the role

IP verification engineer role in AMD's AECG Group focusing on PCIe CXL based IPs, collaborating across architecture, IP design, PD, and product teams to achieve first pass silicon success in ASIC/FPGA projects.

Responsibilities

  • Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified for PCIe CXL based IP's
  • Develop test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
  • Code IP or SS level UVM based testbenches, verification components - monitors, scoreboard, checkers
  • Build the directed and random verification tests
  • Run regressions, debug test failures towards ensuring high design functional, performance and implementation quality

Qualifications

  • Bachelors or Masters degree in computer engineering/Electrical Engineering
  • 8-10 Years of Experience in ASIC Verification
  • Experience with PCIe or CXL or ethernet protocols is a must
  • Proficient in IP level ASIC verification
  • Expert in Verilog, System Verilog, Object Oriented programming
  • Expertise in developing UVM based verification frameworks and testbenches
  • Scripting and automation of verification processes and flows
  • Exposure to leadership or mentorship is an asset
  • Experience working in a team environment through the ASIC / FPGA Project lifecycle from Planning to Tape Out
  • Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
  • Comfortable in python / Perl and editing / maintaining scripts
  • Strong communication skills and the ability to work independently as well as in a cross-site team environment
  • Good Computer Architecture, systems knowledge is a plus
  • Exposure to generative AI or simulation tools for test, testbench, assertion, test plan generation or performance optimization is a plus

Skills

Required:PCIeCXLVerilog/SystemVerilogUVMTestbenchesScripting (Python/Perl)Digital Design & VerificationCommunication & Collaboration

Benefits

  • Benefits offered are described: AMD benefits at a glance
Last updated Oct 22, 2026. Interested? Apply on the company site.
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