RTL Design Engineer
HyderabadFull-timePosted 4mo ago
About the role
ASIC RTL DESIGN ENGINEER at AMD in Hyderabad, India. Lead and contribute across the design hierarchy from architecture to productization for complex silicon IP solutions in a cross-functional, globally distributed team.
Responsibilities
- Define u-architecture from the architecture definition
- Evaluating and executing design and development plans for IPs
- RTL design, IP Integration & documentation
- Participating in and acting as a senior technical reviewer for various u-architecture and implementation reviews within the development organization
- Working with stakeholders to develop comprehensive testing plans including Compliance and Interop testing
- Critically Review and provide feedback on the Design Implementations and Verification plans
- Acting as technical mentor to junior engineers
Qualifications
- A minimum of 8 years of experience
- Proven experience in Silicon IP development process, methodologies, Design for Test methodologies
- Experience with Verilog RTL design, VCS simulation tool, Perl/Shell scripting
- Proven experience in contributing to complex silicon tapeouts
- Detailed understanding and proven track record of developing PCIe, DMAs, NVMe Storage IP, Ethernet/TCP-IP/RDMA IPs
- Strong oral and written communication skills
- Proactive contributor to RTL design methodologies
- Ability to work on complex issues requiring in-depth evaluation of variable factors
- Demonstrated leadership and ability to influence multiple individuals and groups
- Bachelor of Science in Electrical Engineering or Computer Science (Master’s or equivalent preferred)
Skills
Required:RTL designVCSDesign for TestIP ArchitectureCommunication
Nice to have:Programming/Scripting
Benefits
- AMD benefits at a glance
Last updated Oct 15, 2026. Interested? Apply on the company site.
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