SoC Physical Design Implementation Lead
MarkhamCA$187.2k - CA$280.8kFull-timePosted 4mo ago
About the role
Seasoned SoC Physical Design Implementation Lead to own full-chip physical design strategy and execution for AMD’s next-generation Instinct AI and data center processors, including chiplets, 3D stacking, and advanced nodes (3nm/2nm). Focus on PPA optimization, sign-off, methodology innovation, and cross-functional collaboration.
Responsibilities
- Lead SoC-level Physical Design strategy and execution for large, complex chips, including floorplanning, placement, CTS, routing, timing sign-off, and tapeout as part of the Instinct Physical Design team.
- Drive power optimization, PPA closure, and sign-off for advanced nodes (3nm/2nm) on multi-chip architectures with chiplets and 3D stacking.
- Develop and implement advanced physical design methodologies, including AI-driven and data-driven automation, to accelerate design convergence and productivity.
- Collaborate with cross-functional SoC, architecture, and verification teams to ensure performance, quality, and schedule goals are met.
- Provide technical leadership and mentorship, influencing best practices across physical design teams while continuously improving flows and execution efficiency.
Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or equivalent preferred.
- Experience with advanced process nodes, including 3D stacking and integration technologies.
- Strong, hands-on expertise in place & route (P&R), static timing analysis (STA), clock distribution, physical verification, and chip-level integration.
- Proven ability to implement power optimization strategies and achieve PPA closure on large SoCs.
- Advanced knowledge of CAD tools from Synopsys, Cadence, and Siemens (Mentor Graphics).
- Practical experience applying AI or ML techniques, AI-assisted tools, or data-driven automation to improve physical design quality and efficiency.
- Skilled in scripting languages such as Tcl, Perl, and Shell for automation and productivity.
- Demonstrated capability as a self-starter, independently delivering complex, time-critical technical solutions.
Skills
Required:SoC physical design leadershipP&R (place & route)STA (static timing analysis)Clock distributionPhysical verificationChip-level integration
Nice to have:AI/ML in physical designScripting (Tcl, Perl, Shell)
Benefits
- AMD benefits at a glance.
Last updated Oct 15, 2026. Interested? Apply on the company site.
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