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Staff Formal Verification Engineer (GPU)

AMD· Engineering
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Hybrid (Cambridge, United Kingdom)Full-timePosted 4mo ago

About the role

Lead GPU Formal Verification Engineer role at AMD in Cambridge, UK, focusing on driving cutting-edge formal verification methodology for next-generation graphics IP design, building infrastructure, and expanding adoption across the IP development life cycle.

Responsibilities

  • Define long-term strategy for formal verification expansion and steer the technical roadmap
  • Develop cutting-edge formal verification methodology to cover the whole graphics design, including both datapath and control logic. Scale formal verification to big and critical design for bug-free quality. Expand formal verification adoption to the whole IP development life cycle. Resolve challenging convergence issue through world class formal verification techniques like induction, reduction, abstraction, etc.
  • Define and drive the best-in-class formal verification infrastructure to improve formal verification productivity. Enable more verification engineers to adopt this advanced verification technology without deep formal verification knowledge
  • Lead the research group for emerging formal verification domains like security, safety, low power, architect level formal verification, etc. Explore the feasibility of formalizing ISA and memory model for GFXIP design
  • Stay informed of latest trends and innovations in formal verification. Develop technical relationship with broader AMD Design community and peers. Drive cross-department innovation and collaboration inside AMD.

Qualifications

  • In-depth knowledge in formal verification algorithms, engines and use cases
  • Proven expertise in system Verilog assertion and abstract model development
  • Expert user of formal verification tools from both academy and EDA vendors (JasperGold, VC formal, Murphi, theorem prover)
  • Proven track record of delivering high quality verification under tight schedule for modern, large scale processor design like CPU, GPU or AI processor. Comprehensive knowledge of computer architecture and graphics pipeline
  • Proven expertise in developing formal verification infrastructure for FPV, DPV, SEV and other use cases is strongly preferred
  • Undergrad degree required. Master or PhD degree in Computer Science/ Computer Engineering/ Electrical Engineering preferred

Skills

Required:Formal verificationSystemVerilog assertionFormal verification toolsGraphics architecture understanding

Benefits

  • Benefits offered are described in AMD benefits at a glance.
Last updated Oct 15, 2026. Interested? Apply on the company site.
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