Sr. RTL Design Engineer – DDR/LPDDR Memory Controller
Hybrid (Austin, TX), Hybrid (Boxborough, MA), Hybrid (Vancouver, BC)$178.4kFull-timePosted 3mo ago
About the role
Senior RTL Design Engineer to contribute to memory controller design, RTL development, and verification for DDR/LPDDR memory systems within AMD's Memory Controller Design team.
Responsibilities
- Work closely with architects to define and implement IP microarchitecture features
- Develop RTL designs for IP features
- Analyze and optimize designs for power, performance, and area
- Participate in design specification reviews and code reviews
- Perform lint, CDC, and timing analysis to support high-quality design implementation
- Collaborate with verification engineers to validate and debug IP throughout the project lifecycle
Qualifications
- Experience with digital logic design
- Experience with Verilog and/or SystemVerilog
- Experience with scripting languages such as Python, Perl, or Tcl
- Understanding of computer architecture
- Experience with DDR or LPDDR memory systems is preferred
- Experience with EDA tools and design flows, including simulation, lint, and synthesis, is preferred
- Experience with digital logic verification is preferred
- Ability to work independently and collaboratively to deliver technical solutions
- Strong written and verbal communication skills
- Ability to analyze technical problems and develop effective solutions
Skills
Required:RTL designVerilog/SystemVerilog
Nice to have:ScriptingComputer architecture
Benefits
- Benefits offered are described in AMD benefits at a glance.
Last updated Oct 22, 2026. Interested? Apply on the company site.
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