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CPU Core RTL Design Engineer

AMD· Engineering
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Austin, TX$178.4kFull-timePosted 3mo ago

About the role

CPU Core RTL Design Engineer at AMD responsible for designing and optimizing next-generation high-performance processor cores within the central core RTL team, collaborating with architecture, verification, performance, and physical design teams to deliver scalable RTL solutions across client, server, and AI platforms.

Responsibilities

  • Design and implement RTL for CPU core pipeline components and related logic
  • Contribute to microarchitecture definition for next-generation processor cores
  • Collaborate with architecture, verification, and performance teams to deliver optimized designs
  • Analyze and improve performance, power, and timing characteristics
  • Support design verification, synthesis, timing closure, and physical design efforts
  • Debug and resolve pre-silicon and post-silicon issues
  • Partner with cross-functional teams to align on design trade-offs and execution
  • Contribute to scalable RTL methodologies, libraries, and best practices

Qualifications

  • Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or a related field preferred
  • Experience with Verilog/SystemVerilog RTL development in CPU, SoC, or ASIC environments
  • Strong understanding of modern CPU architecture, especially out-of-order cores
  • Expertise in logic design and high-speed processor pipeline development
  • Experience with load/store units or similar core subsystems
  • Knowledge of power-efficient and low-power design techniques, including timing and power optimization
  • Familiarity with synthesis, place-and-route, and timing closure
  • Experience debugging and optimizing designs in collaboration with performance and verification teams
  • Exposure to the full product lifecycle, from architecture through post-silicon debug
  • Familiarity with physical design, scripting (e.g., Python, Tcl), and concepts such as DFT, clocking, reset, and power management

Skills

Required:Verilog/SystemVerilog RTLCPU architectureLogic design
Nice to have:Load/store units

Benefits

  • AMD benefits at a glance
Last updated Oct 15, 2026. Interested? Apply on the company site.
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