FPGA Prototyping Lead
San Jose, CA$200kFull-timePosted 3mo ago
About the role
Lead FPGA prototyping strategy and execution for complex SoCs, driving collaboration across Architecture, RTL Design, Verification, Emulation, Software, and Firmware to enable early hardware validation and first-pass silicon success.
Responsibilities
- Define and own the FPGA prototyping architecture, methodology roadmap, and platform strategy for complex SoCs, including partitioning, interconnects, clocking, debug infrastructure, and high-speed interfaces.
- Lead the development and deployment of FPGA prototype platforms, including RTL adaptation, implementation flows, verification infrastructure, regression environments, and system-level debug capabilities.
- Drive collaboration across Architecture, RTL Design, Verification, Emulation, Software, and Firmware teams to enable early hardware validation, software bring-up, and functional coverage goals.
- Provide technical leadership for FPGA prototyping engineers through mentoring, design reviews, best-practice development, project planning, and execution of key program milestones.
- Establish engineering processes, implementation methodologies, documentation standards, and continuous improvement initiatives to improve efficiency, quality, and scalability.
- Represent the FPGA prototyping organization in architecture reviews, program reviews, and customer-facing technical discussions while partnering with EDA and FPGA tool vendors to drive technology adoption and resolve complex technical challenges.
Qualifications
- 12+ years of experience in FPGA design, implementation, and SoC prototyping.
- Proven experience leading FPGA prototyping efforts for large-scale semiconductor programs.
- Hands-on experience with Synopsys HAPS and/or Cadence Protium platforms.
- Strong knowledge of multi-FPGA partitioning, board bring-up, and high-speed interfaces such as PCIe, DDR, Ethernet, USB, and HBM.
- Expert proficiency with AMD/Xilinx Vivado and Vitis toolchains.
- Deep expertise in FPGA timing closure, floorplanning, CDC analysis, pipelining, and performance optimization.
- Strong SystemVerilog and/or Verilog design and verification experience.
- Solid understanding of modern SoC architectures, including CPUs, cache hierarchies, memory subsystems, NoC/interconnects, and I/O protocols such as AXI, ACE, CHI, PCIe, and DDR.
Skills
Required:FPGA design and prototypingMulti-FPGA partitioningHigh-speed interfacesVivado/VitisSystemVerilog/VerilogSoC architecture
Benefits
- Benefits offered are described: AMD benefits at a glance.
Last updated Oct 15, 2026. Interested? Apply on the company site.
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