PCIe, CXL and Highspeed IO Validation Engineer
Hybrid (Austin, TX), Hybrid (Santa Clara, CA)$194.4k - $291.6kFull-timePosted 2mo ago
About the role
Principal validation engineer role focused on high-speed IO validation (PCIe, CXL, multi-socket, inter-die interfaces) within AMD’s datacenter CPU post-silicon validation team.
Responsibilities
- Develop and execute feature enablement and validation test plans for SoC- and system-level SoC features across all AMD Server products for High-Speed IO
- Develop test content for both focus testing as well as system level stress testing of IO domain plus cross product stress testing
- Develop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup)
- Test interactions between various SoC features using validation infrastructure
- Debug and drive root-cause analysis for SoC related issues
- Collaborate with cross-functional teams in developing tools to improve SoC validation and debug
- Work with cross-functional teams to improve post-silicon validation test strategy, methodology, and process
Qualifications
- BSEE/CSE/CS with 7+ years of experience or
- MSEE/CSE/CS with 5+ years of experience
- Proven hands on experience in soc design or validation of high speed IO interfaces
- Experience in PCIe Gen5/6+, CXL, UCIe or proprietary inter-die and multi-socket server interface in either electrical or functional or both
- Understanding of modern x86 microprocessor architecture and Server platform architecture
- Experience developing validation methodologies and infrastructure
- Test plan and workload development experience
- Participated in silicon bring up and debug, support to internal engineering teams
- Able to execute and drive success of programs with multiple projects on the go
- Debug skills at both SoC and system level
- Familiarity with programming / scripting language (C/C++, Python, Perl, etc.)
- Working knowledge of Server OSes (Linux, Windows)
- Self-starting team player with excellent communication skills
- Forward thinker that drives improvement to development process, code architecture and fosters innovation
- Strong verbal and written English communication skills
- Extensive experience with lab equipment (protocol/logic analyzers, oscilloscopes)
- Extensive experience with board/platform-level debug, including delivery, sequencing, analysis, and optimization
- Extensive knowledge of system architecture, technical debug, and validation strategy
- Strong analytical/problem-solving skills and attention to detail
Skills
Required:PCIe Gen5/6+CXL/UCIeSoC validationLab equipment
Benefits
- Benefits offered are described: AMD benefits at a glance
Last updated Oct 22, 2026. Interested? Apply on the company site.
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