SoC Design Verification Engineer
San Jose, CA$141.8k - $212.6kFull-timePosted 2mo ago
About the role
Adaptive, self-motivated design verification engineer needed to join AMD's SOC team to advance verification of next-generation IP and SOCs, focusing on functional and performance verification, testbench development, and verification quality metrics.
Responsibilities
- Develop/Maintain tests for functional verification and performance verification at the core and SOC level
- Build testbench components to support the next generation IP
- Maintain or improve current test libraries to support IP level testing
- Responsible for closing verification quality metrics like pass rates, code coverage and functional coverage
- Provide technical support to other teams
Qualifications
- Bachelors or Masters degree in computer engineering/Electrical Engineering
- Good understanding of SOC architecture, computer architecture, especially CPU/DSP processors
- Strong coding skills in Verilog/System Verilog, UVM, C/C++, Scripting languages such as Perl/Python
- Strong analytical problem solving skills, attention to detail
- Good understanding in design flow, verification methodology and general computational logic design/verification concepts
- Excellent written and verbal communication skills
- Excellent interpersonal skills, self-motivated
- Prior experience to industry standard protocols such as AXI, AHB, PCIE, DDR etc. will be an advantage
Skills
Required:Verilog/SystemVerilogUVMC/C++
Nice to have:Perl/Python
Benefits
- Benefits offered are described: AMD benefits at a glance.
Last updated Oct 22, 2026. Interested? Apply on the company site.
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