Logic Design Engineer
Santa Clara, CA$166.4k - $249.6kFull-timePosted 2mo ago
About the role
Adaptive, self-motivated logic design engineer to join AMD's mixed-signal high-speed IO team, driving architecture solutions, RTL development, and collaboration across Design Verification and Physical Design to deliver high-quality silicon.
Responsibilities
- Analyze complex digital design problems and propose architecture/micro-architecture solutions
- Develop Verilog RTL and Functional Behavioral Models
- Drive/develop ASIC design flows and scripts
- Create microarchitecture specifications
- Work with the Design Verification team to ensure functional correctness
- Work with the Physical Design team to ensure proper implementation of the design along with timing closure
- Deliver improvements, optimization, and power-saving enhancements
- Support silicon bring-up and diagnostics
Qualifications
- BS/ MS in electrical engineering or equivalent preferred
- Proven experience in analog mixed-signal design from specification to successful silicon
- Experience in high-speed interfaces such as DDR, GDDR, HBM, and high-speed SERDES
- Experience in designs with multiple power domains
- Experience in designs with multiple clock domains
- Experience in behavior modeling for Analog Circuits
- Experience in industry-standard ASIC CAD tools for simulation, synthesis, STA, CDC, UPF, power estimation, etc.
Skills
Required:Verilog RTLFunctional Behavioral ModelsASIC design flowsMicroarchitecture designDesign Verification collaborationPhysical Design collaboration
Benefits
- Benefits offered are described: AMD benefits at a glance.
Last updated Oct 22, 2026. Interested? Apply on the company site.
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