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SerDes Design and Validation Engineer

Apple· Hardware
Apply on company site
Hybrid (Austin, TX), Hybrid (Beaverton, OR), Hybrid (Cupertino, CA), Hybrid (San Diego, CA)Full-timePosted 2mo ago

About the role

Apple is seeking a SerDes Design and Validation Engineer to lead system validation of mixed-signal SerDes IP, contributing to the design, integration and validation of high-performance analog and mixed-signal circuits for SerDes PHY applications, and driving test plans, validation activities and collaboration with production test teams.

Responsibilities

  • Ownership of SerDes system bring-up, validation and debug in system environment.
  • Verify basic operations, analyze robustness and margins in system.
  • Work with design teams to understand architecture and define DFT needs to enhance testability and first-time silicon success.
  • Involvement in mixed-signal verification tasks to understand SerDes operation and interaction with higher level control logic.

Qualifications

  • Minimum requirement of a bachelors degree.
  • Experience in high-speed serial links.
  • Solid understanding and experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters.
  • Solid understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques.
  • Solid understanding and experience with digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops).
  • Hands-on experience to drive lab and production testing, debug, and data analysis.
  • Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization.
  • Skills in scripting and automation to enhance efficiency.
  • Experience in high-speed serial links, with knowledge of common high-speed SerDes protocols like PCIe, USB, DP, and MPHY.
  • Knowledge of Tx/Rx equalization techniques and circuits, including CTLE, DFE, and de-emphasis, as well as CDR architectures and implementations.
  • Exposure to firmware assisted mixed signal IP development is desirable.
  • Knowledge and inquisitiveness in AI/ML domains, and ability to apply the concepts for improved silicon performance and productivity improvements in IP design/validation.

Skills

Required:Bachelor's degreeHigh-speed SerDes experienceAnalog mixed-signal circuit designLab and production testing
Nice to have:DFT and testabilityAMS IC developmentScripting/automationAI/ML concepts for silicon
Last updated Jul 31, 2026. Interested? Apply on the company site.

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