Graphics Cache Hierarchy Design Verification Engineer
Apple· Hardware
Santa Clara, CA$150.4k - $277.6kFull-timePosted 2mo ago
About the role
Verification engineer focused on pre-silicon RTL verification of graphics memory subsystem units within Apple’s GPU design, including caches, memory management unit, interconnects, and link interfaces. Requires strong computer architecture background and verification methodology expertise.
Responsibilities
- Develop verification plans in coordination with design leads and architects.
- Build and maintain portable verification test bench components and environments.
- Generate directed and constrained random tests.
- Run simulations and debug design and environment issues.
- Create functional coverage points, analyze coverage, and improve test environment to target coverage holes.
- Create automated verification flows for block verification.
- Apply knowledge of hardware description languages (VHDL/Verilog) to verify complex designs.
- Work with other block, memory subsystem and core level engineers to ensure seamless verification flow.
Qualifications
- Experience in CPU or GPU architecture.
- Experience developing unit or cluster level test environments.
- Experience with driving bring up and debug of complex designs.
- Experience with verification languages such as SystemVerilog.
- Experience with HDL simulators and waveform viewers.
- BS + minimum of 2 years of experience.
Skills
Required:Verification planningTest bench developmentConstrained random testingSimulation debuggingFunctional coverageSystemVerilogHDL tools
Nice to have:UVMProgramming/scripting
Benefits
- Comprehensive medical and dental coverage
- retirement benefits
- discounted products and free services
- reimbursement for certain educational expenses—including tuition
- discretionary bonuses or commission payments and relocation eligibility
- access to Apple shareholder programs and Employee Stock Purchase Plan
Last updated Sep 18, 2026. Interested? Apply on the company site.
About Apple
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