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Experienced CAD Automation Engineer (Design Verification)

Apple· Hardware
Apply on company site
Hybrid (Cambridge)full-timePosted 2mo ago

About the role

Role focused on delivering high quality infrastructure to automate chip design processes, optimize simulation tool performance for large-scale RTL simulations, and collaborate with vendor and internal teams to develop and deploy new methodologies.

Responsibilities

  • Assist with delivering high quality infrastructure for automating chip design processes.
  • Optimise the performance of simulation tools to maximise efficiency and reduce resource requirements (compute time and space) as chip designs scale.
  • Develop and deploy new methodologies with vendor and internal teams.
  • Support and debug issues on large scale simulations.

Qualifications

  • BS, MS, or PhD in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, Computer Science, Software Engineering or a related field
  • Minimum 5 years of experience working on RTL simulation tools
  • Strong foundation on Linux and grid computing systems
  • Knowledge of scripting languages such as Python or Perl
  • Strong interpersonal and analytical skills
  • Ability to work well within a team and be productive under tight schedules
  • Fluency in English required
  • Expert knowledge on Cadence tool chain
  • Familiarity with SystemVerilog / Verilog / VHDL
  • A curiosity about GPU / PMU / CPU / SOC architecture and micro-architecture

Skills

Required:RTL simulation toolsLinuxgrid computingPythonCadence tool chainSystemVerilog / Verilog / VHDL
Nice to have:PerlChip architecture curiosity
Last updated Sep 18, 2026. Interested? Apply on the company site.

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