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Digital Verification Engineer

Neuralink· Brain Interfaces Hardware
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South San Francisco, CA$131k - $243kfull-timePosted 2mo ago

About the role

ASIC Design Verification Engineer position within Neuralink's SoC department, focusing on high-throughput, low-power digital DSP modules for brain-computer interfaces.

Responsibilities

  • We are looking for ASIC Design Verification Engineers with strong CPU, ASIC design and verification fundamentals to work in Neuralink’s System-on-Chip (SoC) department under the Implant Team.
  • The team delivers architecture and logic implementation of digital modules with a strong focus in high-throughput low-power digital signal processing (DSP).
  • Contribute to architecture, microarchitecture, RTL verification and test benches for a complex ASIC/SoC.
  • Develop automation flows and scripts to facilitate verification workflows.
  • Collaborate to push frontiers of brain-computer interface technology.

Qualifications

  • Minimum 3 years of experience in digital ASIC verification.
  • Excellence in SystemVerilog.
  • Experience in developing automation flow and scripts such as Python, Perl, Makefile, Tcl and UNIX shell
  • Experience with code coverage and regression setup.
  • Bachelor's degree in a technical field OR equivalent experience.

Skills

Required:SystemVerilogDigital ASIC verificationAutomation scripting

Benefits

  • Excellent medical, dental, and vision insurance through a PPO plan
  • Paid holidays
  • Commuter benefits
  • Meals provided
  • Equity (RSUs) for full-time employees
  • 401(k) plan
  • Parental leave
  • Flexible time off
Last updated Oct 21, 2026. Interested? Apply on the company site.

About Neuralink

Pioneering Brain Computer Interfaces

Creating a generalized brain interface to restore autonomy to those with unmet medical needs today and unlock human potential tomorrow.

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