← All roles

Electrical Packaging Design Engineer

AMD· Engineering
Apply on company site
Hybrid (San Jose, CA)$200k - $300kFull-timePosted 2mo ago

About the role

Electrical packaging design engineer for AMD's Adaptive and Embedded Computing Group, focusing on high-performance, cost-effective package solutions for FPGA devices across multiple package families. Role spans from design start to sign-off with cross-team collaboration, emphasizing electrical requirements translation into manufacturable packaging and power integrity analyses.

Responsibilities

  • Use Cadence tools for design, modeling and simulations. Enable timely closure of designs by getting involved with pre-design negotiations with chip/system teams and take it to design sign off.
  • Use analytical and simulation tools to define package/module design requirements (technology, stack-up, etc.) in the project conception stages and negotiate with chip/system teams on product specification.
  • Conduct routing, stack-up & component placement studies in addition to completing the package design activities. Translate requirements (Design guidelines, technology, stack-up, manufacturing time etc) for various device packaging.
  • Collaborate with PCB Layout Engineers to optimize the package ballmap and chip team to optimize the die size.
  • Develop multi-signal package/module models over 50 GHz bandwidth and suitable test structures for model to measurement correlation.
  • Come up with performance metrics for organic package technologies in order to design high speed chips and systems.
  • Perform Power Integrity analysis for core as well as IO and generate power delivery network requirements with emphasis on model to measurement correlation.
  • Develop scripts for checking package parameters across device families, maintain a database of electrical design guidelines and rules for IO and PDN package layout implementations.

Qualifications

  • Bachelor’s or Master's degree in Engineering
  • Current working Knowledge of Cadence package design tool is a must. knowledge of SKILL is a plus.
  • Working knowledge of 2D/3D package design and modeling tools, such as Cadence, Ansys, AutoCAD etc.
  • Knowledge on DoE, DFM/DFR is a plus.
  • Good knowledge of SerDes design and package/PCB layout constraints.
  • Mentor junior package designers in the group.
  • Have a good understanding of various Organic/PCB technologies in order to interpret/negotiate layout guidelines.
  • Package/PCB layout experience. Experience in high power, Gbs IO products is a plus.

Skills

Required:Cadence package design
Nice to have:DoE / DFM / DFR knowledgeSerDes design

Benefits

  • Benefits offered are described: AMD benefits at a glance.
Last updated Oct 22, 2026. Interested? Apply on the company site.
AMD logo

About AMD

together we advance_AI

AMD delivers leadership high-performance and adaptive computing solutions to advance data center AI, AI PCs, intelligent edge devices, gaming, & beyond.

AIData CenterHigh-Performance ComputingGamingEdge Devices
Company profileWebsite

More open roles at AMD