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High Speed DAC Design Expert

AMD· Engineering
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San Jose, CA$216k - $324kFull-timePosted 2mo ago

About the role

Expert in analog/mixed-signal circuit design for high-speed Serdes technology, focusing on DAC/ADC, clocking, and front-end analog blocks in 200G+ CMOS transceivers. Located in San Jose, CA. Not eligible for visa sponsorship.

Responsibilities

  • Own performance-critical analog mixed-signal circuit blocks used in Serdes, such as high-speed data converters (DAC and ADC), clocking (reference clock, PLL, clock dividers, mixers, buffers, regulators, multi-phase clock generators, error detection and correction), and analog front-end circuits (pad matching networks, ESD, CTLE, linear amplifier)
  • Define circuit-driven micro-architectures of Tx and Rx subsystems and drive sub-block level specs
  • Own power, performance, area, and jitter budgets of analog design blocks
  • Mentor sub-block owners and conduct peer reviews of design and verification results
  • Work with pre-tapeout verification and post-silicon validation teams to bring up silicon and analyze silicon results

Qualifications

  • Ph.D. in Electrical Engineering or related field or M.S. with relevant industrial experience in optical and/or electrical transceiver design

Skills

Required:Analog/mixed-signal circuit designHigh-speed data converters (DAC/ADC)Clocking systems (PLL, reference clocks, dividers)Power, performance, area, jitter budgetsPre-tapeout verification

Benefits

  • Benefits offered are described in AMD benefits at a glance.
Last updated Oct 22, 2026. Interested? Apply on the company site.
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