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IP Post-Silicon Validation Lead

AMD· Engineering
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Markham, CanadaCA$187.2kFull-timePosted 2mo ago

About the role

Senior IP Validation Design Lead for AMDNBIO team, focusing on planning, validation, and debugging of hardware IP for AMD SOC programs (APU, CPU, Compute, and Discrete Graphics). Role emphasizes cross-functional collaboration, pre-silicon activities, and technical leadership in IP validation and automation.

Responsibilities

  • Drive the planning, validation, and debug of various hardware IP for forthcoming AMD APU, CPU, Compute and Discrete Graphics SOC programs.
  • Comprehend the SOC as a complete system including HW (Silicon), FW, BIOS & SW and ensure alignment to enable features, optimize performance and power.
  • Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop architectural solutions to achieve product requirements.
  • Define, document, execute and report the overall functional test plan and end to end validation strategy for a set of AMD IP’s.
  • Drive technical innovation to enhance AMD's capabilities in IP validation, including tools and scripts/automation development, methodology enhancements, and cross-functional initiatives.
  • Debug IP issues found during pre-silicon, bring-up, system validation, and production phases of SOC programs.
  • Engage in pre-silicon shift-left activities with DV, Diagnostics, Emulation and other software/hardware modeling frameworks to ensure readiness for first silicon, enablement of IP functionality, and debug of critical features.
  • Lead collaborative technical discussions to drive resolution of technical issues and roll out technical initiatives.
  • Develop knowledge of system architecture/debug and other internal IP’s; support issues on customer platforms as required by customer engineering teams.

Qualifications

  • Bachelor’s or Master’s degree majoring in EE, CS or related field.
  • Outstanding foundation in Systems & SoC architecture, with expertise in CPU or GPU, Memory sub-system, Fabrics, High Speed I/O subsystems, Clocks, Resets, Virtualization and Security.
  • Experience in digital logic design/verification/post-silicon validation.
  • Extensive experience with ASIC debug techniques and methodologies.
  • Knowledge of physical and protocol levels of common high-speed interfaces is an asset.
  • Experience with board/platform-level debug, including clock/power delivery, sequencing, analysis, and optimization.
  • Strong scripting skills (e.g., Ruby, Python).
  • Extensive experience with lab equipment (protocol/logic analyzers, oscilloscopes).
  • Excellent communication, management, and presentation skills.
  • Adept at collaboration across geographies; leadership and mentoring skills are a definite asset.
  • Must be a self-starter and able to independently drive tasks to completion.

Skills

Required:Systems & SoC architectureDigital logic design/verificationASIC debug techniquesScriptingLab equipment proficiencyCommunication and leadership

Benefits

  • AMD benefits at a glance
Last updated Oct 15, 2026. Interested? Apply on the company site.
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