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2027 Masters ASIC Package Engineering Co-op/Intern

AMD· Engineering
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Hybrid (San Jose, CA / Santa Clara, CA)$83.2kUNAVAILABLEPosted 2mo ago

About the role

ASIC Package Engineering co-op/intern position at AMD focused on developing and validating advanced packaging technology, including substrate/interposer/bump design, design verification, and yield improvement.

Responsibilities

  • Support Package design and Package Development Engineers in prioritizing and optimizing new projects
  • Train to complete substrate, interposer and bump designs for AMD products, test vehicles and probe card substrates
  • Participate in design verification implementation to ensure design performance, quality and efficiency
  • Analyze yield and defect metrics to improve design performance and yield
  • Evaluate and benchmark packaging materials and interact with partners to achieve cost-efficient designs and optimal performance and yield

Qualifications

  • Currently enrolled in a US-based University in a Masters degree program majoring in Electrical Engineering, Engineering Science, Computer Engineering, Mechanical Engineering, Material Science Engineering, or a related field

Skills

Required:Transmission lines and electric circuitsPackage, silicon or PCB design softwareScripting languages (Perl / Python / SQL)Semiconductor theory and packaging process/technology
Nice to have:Data analytics and data visualization tools (Power BI)

Benefits

  • AMD benefits at a glance
Last updated Oct 22, 2026. Interested? Apply on the company site.
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