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Design Verification Engineer

AMD· Engineering
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Markham, ONCA$128k - CA$192kFull-timePosted 2mo ago

About the role

Silicon Design Verification Engineer role focusing on IP verification and validation within AMD's Data Accelerator (DACC) team, contributing to verification strategy, automation, PPV, and AI-assisted verification across multiple projects and domains including encryption, authentication, compression, and live VM migration.

Responsibilities

  • Architect, develop, and maintain block- and subsystem-level IP verification testbenches, test methodology and infrastructure, setting technical direction for the team
  • Own detailed test plans for covering new features across multiple blocks and drive test plan reviews with cross-functional stakeholders
  • Lead triage of regressions, debug complex simulations, analyze coverage, and drive resolution of technical issues with design, verification and other teams to achieve verification closure
  • Deploy and help evolve industry leading verification methodologies such as UVM, formal verification, and AI-assisted verification flows
  • Take end to end ownership of key features across multiple projects, and mentor junior and mid-level engineers on verification best practices
  • Reproduce silicon functional bugs in simulations and/or formal verification tools
  • Conduct code reviews and help establish coding and verification standards for the team

Qualifications

  • Bachelor's or Master's degree in Computer or Electrical Engineering with industry verification experience
  • Extensive hands-on hardware verification experience across multiple projects or tapeouts
  • Proficient in Verilog, SystemVerilog, UVM and working in Linux and Windows environments
  • Experience applying AI agents and skills to functional verification, and evaluating new AI-based verification tools for team-wide adoption
  • Excellent programming skills
  • Familiarity with Makefiles, scripting languages like Perl, Python, Ruby etc.

Skills

Required:ASIC Functional VerificationTestbench developmentUVMVerilog/SystemVerilog
Nice to have:Formal verificationAI-assisted verificationScripting languages

Benefits

  • Benefits offered are described: AMD benefits at a glance
Last updated Oct 15, 2026. Interested? Apply on the company site.
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