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Silicon Validation/Emulation Design Engineer

Apple· Hardware
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Sunnyvale, CA$184.7k - $324.8kFull-timePosted 1mo ago

About the role

Role focused on pre-silicon hardware validation of Wireless SoCs with custom accelerators and ARM-based subsystems, using Cadence Palladium emulation platforms for system-level and IP-level debugging, automation, and performance optimization throughout emulation flows and platform bring-up.

Responsibilities

  • Building and maintaining Palladium emulation environments, including compile flows, netlist preparation, memory modeling, and clock/reset configurations
  • System-level debug and root cause analysis of complex hardware issues on the emulation platform
  • IP-level debug and validation, working closely with IP owners to isolate and resolve design issues
  • Development and implementation of automation aids, flows, and scripts to improve Palladium build efficiency, debug turnaround, and platform utilization
  • Performance profiling and optimization of emulation models to maximize execution speed
  • Collaboration with multi-disciplinary groups to make sure emulation deliverables are on schedule and support critical program milestones
  • Own and maintain Palladium emulation build flows for SoC and subsystem-level models
  • Drive debug and triage of emulation model issues, working with RTL designers and verification engineers
  • Support system-level hardware validation efforts and hardware integration
  • Develop reusable debug methodologies and collateral to accelerate issue resolution
  • Optimize emulation model performance through compile tuning, partitioning strategies, and platform configuration
  • Thoroughly document flows, debug procedures, and best practices
  • Collaborate with cross-functional teams to define emulation requirements and support prototype hardware validation

Qualifications

  • BS and a minimum of 10 years relevant industry experience
  • Proven experience with Cadence Palladium (or equivalent emulation platforms such as Synopsys ZeBu), including build flows, compile optimization, and platform bring-up
  • Strong debugging skills with experience in system-level and IP-level debug on emulation platforms
  • Experience with emulation compile flows, including synthesis for emulation, memory compilation, clock modeling, and I/O abstraction
  • Proficiency in debug tools and methodologies (waveform analysis, signal probing, assertion-based debug, transactors)
  • Solid understanding of RTL design concepts, SoC architectures, ARM-based subsystems, and standard bus protocols (AXI, AHB, APB)
  • Experience developing and maintaining automation scripts (Python, Tcl, Perl, Shell) to streamline emulation workflows
  • Strong analytical and problem-solving skills with ability to debug complex system-level issues
  • Experience with Wireless SoC applications (Wi-Fi, Bluetooth, cellular) - strongly preferred
  • Excellent communication and collaboration skills to work effectively across functional teams
  • Experience with version control systems (Git, Perforce) and CI/CD integration for emulation flows

Skills

Required:Cadence PalladiumSystem-level debugIP-level debugAutomation scriptingRTL/SoC knowledge

Benefits

  • Comprehensive medical and dental coverage
  • retirement benefits
  • range of discounted products and free services
  • reimbursement for certain educational expenses (tuition)
  • discretionary bonuses or commission payments (potential)
  • relocation support
  • Apple Employee Stock Purchase Plan eligibility
Last updated Aug 28, 2026. Interested? Apply on the company site.

About Apple

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