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IP Verification Engineer

AMD· Engineering
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San Jose, CA$200kFull-timePosted 1mo ago

About the role

Verification engineer in the AECG Group at AMD, focusing on FPGA/ASIC verification for various target customers. Collaborates with architecture, IP design, PD teams, and product engineers to achieve first pass silicon success.

Responsibilities

  • Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
  • Develop test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
  • Code IP or SS level UVM based testbenches, verification components - monitors, scoreboard, checkers
  • Build the directed and random verification tests
  • Run regressions, debug test failures towards ensuring high design functional, performance and implementation quality

Qualifications

  • Bachelors or Masters degree in computer engineering/Electrical Engineering
  • Proficient in IP level verification
  • Strong knowledge of Verilog, SystemVerilog, Object Oriented programming
  • Expert in developing UVM based verification frameworks and testbenches
  • Experience with PCIe, CXL, NVMe or ethernet protocol
  • Exposure to AI in automation of verification processes and flows
  • Good Computer Architecture, systems knowledge
  • Comfortable in python / perl and editing / maintaining scripts
  • Strong communication skills and ability to work independently and in cross-site teams
  • Proven technical leadership experience through project lifecycle from Planning to Tape Out

Skills

Required:IP level verificationUVM based verification frameworks and testbenchesVerilog / SystemVerilog / OO programming
Nice to have:PCIe, CXL, NVMe or Ethernet protocolsPython / Perl scripting

Benefits

  • Benefits offered are described: AMD benefits at a glance.
Last updated Oct 22, 2026. Interested? Apply on the company site.
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