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Verification Platform Engineer, Platform Architecture

Apple· Hardware
Apply on company site
Hybrid (Austin), Hybrid (Cupertino)Full-timePosted 1mo ago

About the role

Apple’s Platform Architecture group develops high-performance verification systems to accelerate Apple silicon development and pre-silicon validation. The role focuses on bridging platform technology with DV methodology, enabling throughput improvements in DV workflows through testbench design, infrastructure, and platform R&D.

Responsibilities

  • Own engagements with silicon engineering groups to evaluate, integrate, and maintain high performance RTL simulation tooling.
  • Modify testbench and design RTL for tool compatibility and simulation efficiency.
  • Use internal and external EDA tools (e.g., RTL simulation tools, Logic Equivalence Checking [LEC], wave dumps, design libraries) to diagnose issues and explore design alternatives.
  • Design and integrate infrastructure improvements for faster simulation turnaround after RTL changes.
  • Partner closely (or embed) with internal teams for focused, high-impact engagements.
  • Occasionally travel (approximately once a year) to collaborate with development groups within the US.

Qualifications

  • Bachelor’s degree in Computer Engineering, Electrical Engineering, or a related field (or equivalent practical experience).
  • Experience with SystemVerilog and EDA tooling.
  • Experience with software development (e.g., using C++) and scripting (e.g., Perl or Python).
  • Master’s degree in Computer Engineering, Electrical Engineering, or another hardware-related field.
  • 10+ years of relevant experience.
  • Deep hands-on experience in Design Verification methodologies (UVM, DPI-C, testbench architecture).
  • Experience applying LEC, linting / static analysis tools, waveform debugging, and simulation / emulation flows.
  • Strong understanding of SystemVerilog simulation semantics (events, time, glitches); intuitive grasp for hardware representation (clocks, resets, latches).
  • Strong communication skills, with cross-functional collaboration across silicon engineering, design verification, and EDA development teams and organizational boundaries.
  • Experience with software optimization, high-performance computing (HPC), co-simulation architectures, or hardware acceleration / emulation.
  • Development of agentic pipelines, graphs, skills, or similar work enabling AI productivity for other engineers.

Skills

Required:SystemVerilogEDA toolingC++Python/PerlVerification methodologiesHardware conceptsCommunication & collaboration
Last updated Oct 16, 2026. Interested? Apply on the company site.

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