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ASIC Design Engineer - Pixel IP ANE

Apple· Hardware
Apply on company site
Sunnyvale, CA$150.4k - $277.6kFull-timePosted 1mo ago

About the role

Design and integration engineer for Apple Neural Engine (Pixel IP ANE) within the Pixel IP team. Collaborate cross-functionally to design, verify, and optimize high-speed compute subsystems for AI/ML workloads, with emphasis on RTL design, verification, timing, power, and DFT/BIST.

Responsibilities

  • Doing RTL design on high speed, high performance subsystem.
  • Working with design verification and formal verification teams to fully verify design and performance.
  • Working with physical design and static timing team to produce high quality netlist through synthesis.
  • Analyze clock domain crossing design for correctness.
  • Working with DFT, and BIST team to ensure design can be fully tested.

Qualifications

  • BS + 3 years of experience
  • Extensive knowledge of bus topology, such as AMBA is required.
  • Experience working on large, high speed, compute system
  • Good knowledge base on Clock Domain Crossing designs
  • Experience with Synthesis
  • Experience with Static Timing Analysis
  • Experience working with Power Intent

Skills

Required:RTL designDesign verificationSynthesisStatic Timing AnalysisClock Domain CrossingPower IntentAMBA bus protocols
Nice to have:Formal verification

Benefits

  • Comprehensive medical and dental coverage
  • retirement benefits
  • discounted products and free services
  • reimbursement for certain educational expenses — including tuition
  • discretionary bonuses or commission payments as well as relocation (possible)
  • Apple shareholder opportunities through stock programs
  • Employee Stock Purchase Plan
Last updated Sep 4, 2026. Interested? Apply on the company site.

About Apple

Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.

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