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CPU Design Timing Engineer

Apple· Hardware
Apply on company site
Hybrid (Austin, TX)Full-timePosted 1mo ago

About the role

Timing-focused role responsible for timing closure of CPU projects, collaborating with RTL, implementation, and CAD teams to develop timing flows, perform timing analysis, and ensure successful timing closure for high-performance CPU designs.

Responsibilities

  • Working with the CAD team to develop the timing flow used on the project including scripting to improve analysis flows and engineer efficiency
  • Working extensively with CPU micro-architects and implementation engineers to drive timing closure for the CPU
  • Responsible for the timing closure of the project

Qualifications

  • Minimum BS required
  • Experience with script writing in TCL, Perl, Python
  • Implementation experience on high performance CPU designs
  • Working knowledge of CPU microarchitecture including common critical loops for timing and understanding of low power microarchitecture and implementation techniques for CPUs
  • Good understanding of physical design tools and methodology including physically aware synthesis and place & route tools and flows, extraction, and other analysis flows, and physical design verification (LEC, DVS, etc.)
  • Experience working on timing for 1 GHz+ designs, including how to handle multiple clock and power domains
  • Experience with one of the following static timing tools: Primetime or Tempus
  • Experience with cross talk, noise, OCV, uncertainty, and derate methodology

Skills

Required:ScriptingTiming analysisPhysical designStatic timing analysis toolsCPU microarchitecture

Benefits

  • Equal opportunity employer commitment to inclusion and diversity
  • Accessibility and reasonable accommodations information available
Last updated Sep 4, 2026. Interested? Apply on the company site.

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