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GPU Performance Architect

AMD· Engineering
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Hybrid (Austin, TX)$178.4kFull-timePosted 1mo ago

About the role

GPU Performance Architect at AMD responsible for workload/competitive analysis, performance bottlenecks analysis, and PPA improvements across graphics cores and SoCs, with collaboration across sites and focus on AI/ML/graphics compute workloads.

Responsibilities

  • Work on workload/competitive analysis of contemporary and futuristic game/AI/ML applications
  • Identify complex technical problems, break them down, summarize multiple possible solutions, and help the team make progress
  • Work with architects to understand bottlenecks in graphics cores and SoCs
  • Analyze existing and emerging graphics/compute paradigms and algorithms
  • Implement and run simulation models - i.e., both RTL and high-level simulation to estimate potential gains
  • Propose innovative solutions for PPA improvements
  • Drive initiatives to improve RTG analysis tools
  • Collaborate with engineers and managers on multiple sites.

Qualifications

  • Bachelor of Science, Masters or PhD degree with emphasis in Electrical Engineering, Computer architecture, or Computer Science is preferred
  • Experience spanning architecture, performance analysis and AI/ML/graphics/compute algorithms
  • Experience in Kernel development of LLMs using PyTorch, Triton, CUDA, HIP etc.
  • Excellent C/C++/Scripting (Python, etc.) experience
  • Knowledge of Graphics/Compute APIs (DirectX/Vulkan/CUDA/HIP etc.)
  • Experience with AI/ML use cases and demonstrated ability to effectively leverage and collaborate with AI agents in modern engineering workflows
  • Knowledge of GPU architecture and Compilers
  • Experience in GFX profiling tools is a plus (PIX, RenderDoc, AMD tools, etc.)

Skills

Required:Workload/competitive analysisProblem decompositionC/C++PythonGraphics/Compute APIs
Nice to have:RTL and high-level simulationGFX profiling tools

Benefits

  • AMD benefits at a glance
Last updated Oct 22, 2026. Interested? Apply on the company site.
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