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Senior Chip Lead Engineer-SoC/ASIC

AMD· Engineering
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San Jose, California$164k - $246kFull-timePosted 1mo ago

About the role

Senior ASIC/FPGA design leader responsible for driving chip programs from architecture through production, partnering cross-functionally to deliver full-chip solutions with technical depth and program-level perspective.

Responsibilities

  • Lead chip design initiatives from architectural concept through production release.
  • Provide technical guidance across all phases of the chip development lifecycle, engaging domain experts when appropriate.
  • Drive technical decisions in ambiguous and rapidly evolving project environments.
  • Develop a broad understanding of system-level tradeoffs while maintaining expertise in key technical areas.
  • Partner with chip leads and program managers to support scheduling, resource planning, and risk mitigation.
  • Interface with customers, foundries, IP vendors, and EDA tool suppliers.
  • Coordinate activities across hardware, software, systems, validation, and product teams.
  • Build alignment and drive consensus among diverse stakeholders.
  • Navigate complex situations with limited direction and establish clear execution plans.
  • Identify and resolve complex technical challenges throughout the design flow.
  • Apply analytical thinking and creative problem-solving approaches to overcome obstacles.
  • Drive continuous improvement in design methodologies, development processes, and engineering practices.
  • Contribute to technical strategy and long-term organizational capability growth.

Qualifications

  • 10+ years of semiconductor industry experience.
  • 8+ years of hands-on ASIC and/or FPGA design experience.
  • Demonstrated experience across multiple phases of chip development including: Architecture definition and specification; RTL development; Verification and validation; Physical design; Package development; Power optimization; Silicon validation and characterization; Manufacturing and production ramp; System software development including device drivers and low-level software.
  • Experience working in ambiguous environments and adapting to changing requirements.
  • Deep technical expertise in one or more semiconductor disciplines with broad understanding of the full chip development lifecycle.
  • Strong knowledge of SoC and subsystem architecture; RTL design and synthesis; Verification methodologies; Physical design principles; Timing closure; Power optimization techniques; Manufacturing test and DFT methodologies; Silicon bring-up and debug; Package development and production ramp processes.
  • Knowledge of ASIC and FPGA design tools and methodologies.
  • Proficiency with Verilog, VHDL, and/or SystemVerilog.
  • Working knowledge of industry-standard EDA tools.
  • Understanding of semiconductor manufacturing processes.
  • Strong written and verbal communication skills.
  • Ability to influence stakeholders and drive outcomes without formal authority.
  • Proven collaboration across engineering, business, and organizational boundaries.
  • Strong strategic thinking, prioritization, and problem-solving abilities.
  • Self-directed with a demonstrated growth mindset and learning agility.

Skills

Required:Chip program leadershipCross-functional collaboration

Benefits

  • This role is not eligible for visa sponsorship.
Last updated Oct 8, 2026. Interested? Apply on the company site.
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