Radiation Effects & RAS Silicon Architect
San Jose, CA$166.4k - $249.6kFull-timePosted 1mo ago
About the role
Role focused on FPGA and SoC architecture definition and development with emphasis on radiation effects and reliability, SEE/RAS mitigation, and related verification for terrestrial and space markets at AMD.
Responsibilities
- Apply IC Design and Solid State Physics fundamentals to develop industry-leading solutions for Single Event Effects (SEE), including SEU, SEL, and SEFI, as they apply to FPGAs and space-grade silicon
- Define and develop SEE PDKs (Product Design Kits), test vehicles, and system-level radiation hardening solutions; evaluate test vehicles at the FPGA level
- Contribute to the architecture definition of XQR/Space-grade FPGA and SoC products, including SEE/RAS architectural specifications
- Analyze semiconductor technology scaling and its impact on radiation sensitivity (Moore's Law and More than Moore)
- Build predictive models for next-generation radiation performance, including competitive feature sets, power, and cost trade-offs
- Collaborate closely with Silicon Technology, Advanced Architecture, and Marketing teams
Qualifications
- Master's or PhD degree in Electrical Engineering, Applied Physics or equivalent
- Experience at a leading semiconductor company in advanced silicon process technologies and architectures
- Deep knowledge of radiation effects (SEU, SEL, SEFI, TID), including underlying physics and impact on semiconductor devices and FPGAs
- Knowledge of FPGA and SoC architecture, implementation, and software tools
- Self-driven, able to set direction and execute independently
- Willingness to travel to worldwide test facilities, and development consortia
Skills
Required:Single Event Effects (SEE)Radiation hardeningFPGA/SoC architecture
Last updated Oct 22, 2026. Interested? Apply on the company site.
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