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Summer 2027 Long Term ASIC Verification Engineering Intern/ Co-Op

AMD
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OttawaUNAVAILABLEPosted 1mo ago

About the role

Intern/Co-Op position in ASIC verification at AMD, Ottawa, focused on SystemVerilog-UVM based verification environments for next-gen ASIC/IP for wired communications and data centers. Full-time onsite for 12 or 16 months starting May 2027.

Responsibilities

  • Contribute to the development of advanced SystemVerilog-UVM based verification environments and IP components
  • Write tests, sequences, and testbench components in SystemVerilog and UVM to achieve verification of the design
  • Learn to employ a Coverage-Driven Verification methodology with Constrained Random Stimulus
  • Review and contribute to verification plans and design specifications
  • Contribute to process improvements via automation of tasks and exploring and evaluating new tools and methodologies
  • Investigate and root cause issues found during the IP development stage

Qualifications

  • 3rd/4th year Computer Engineering or Computer Science students
  • Understanding of digital design principles
  • Understanding of Object Oriented Coding practices
  • Experience with AI tools
  • Experience with Systemverilog, C or C++ programming languages
  • Experience with Python, Perl or other scripting languages is an asset
  • Candidates must hold a valid work authorization to be considered for this role

Skills

Required:SystemVerilogUVMC/C++
Nice to have:Python
Last updated Oct 15, 2026. Interested? Apply on the company site.
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