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2027 PhD SerDes Optical Transceivers Silicon Design and Architecture Modeling Engineer Intern/Co-op

AMD
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San Jose, CA / Santa Clara, CA$91.5kUNAVAILABLEPosted 1mo ago

About the role

Intern/Co-op position at AMD focused on SerDes optical transceivers silicon design and architecture modeling, with mentorship, hands-on projects, and final presentations. Onsite full-time term in San Jose or Santa Clara, CA.

Responsibilities

  • Engage in cutting-edge silicon design and architecture modeling projects related to SerDes optical transceivers.
  • Collaborate with mentor engineers to understand problems, define objectives, and explore solutions.
  • Learn and use engineering tools including CAD, AI, software development, and modeling environments to support project work.
  • Research, evaluate, and propose innovative design/architecture solutions using analytical and simulation-based approaches.
  • Document technical findings, summarize results, and deliver a final presentation to the engineering team at term end.

Qualifications

  • Currently pursuing a PhD in Electrical Engineering, Computer Science & Engineering, Mathematics, Physics, or related field with at least two years of PhD coursework or research completed.
  • Coursework or hands-on research experience in device physics, circuit design, RTL/logic design, design automation, software engineering, RF design, DAC design, ADC design, SerDes design, DSP design, CDR design, PLL design, or clocking circuit design.
  • Familiarity with power-efficient and high-performance circuit design methodologies.
  • Experience using simulation, modeling, or design tools to analyze and validate engineering designs (preferred).
  • Demonstrated ability to conduct technical research, evaluate alternatives, and apply engineering fundamentals to solve complex problems.
  • Interest in advanced communication systems, optical transceivers, mixed-signal circuits, and next-generation high-speed interconnect technologies.

Skills

Required:PhD-level Electrical Engineering / CS-related expertiseDevice physicsCircuit design (RTL/logic, DAC/ADC, PLL, clocking)SerDes design and DSP design
Nice to have:Design automation and simulation tools
Last updated Oct 15, 2026. Interested? Apply on the company site.
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