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CPU RTL Power, Clocking, Reset Design Engineer

AMD· Engineering
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Hybrid (Ft. Collins, CO)$144.8k - $217.2kFull-timePosted 1mo ago

About the role

RTL design engineer specializing in power management, clocking, and reset microarchitecture for AMD Core Complex Cache Hierarchy; responsible for delivering high-performance RTL and collaborating across Architecture, Physical Design, Verification, and other teams.

Responsibilities

  • Collaborate with Architecture, Physical Design, Verification, and Design-for-Test teams to design, document, implement, verify, and deliver high-performance Power, Clocking, Reset, and Control Fabric RTL optimized for timing, testability, manufacturability, and physical implementation.
  • Work across global IP and SoC teams to solve complex architectural interactions and drive successful product execution.
  • Improve CPU design quality, performance, power, and area through innovation, simplification of design complexity, and enhanced cross-functional technical collaboration.
  • Solve complex design and tool challenges using innovative approaches and communicate solutions through technical presentations to peers and management.
  • Guide, mentor, and develop engineers across the organization.

Qualifications

  • Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or Computer Science, plus experience in RTL design and microarchitecture development for processors or complex IPs.

Skills

Required:Verilog HDLDigital RTL DesignScriptingClock managementPower management

Benefits

  • Benefits offered are described: AMD benefits at a glance.
Last updated Oct 8, 2026. Interested? Apply on the company site.
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